| 摘要 |
PURPOSE:To form a voltage limit circuit that can be easily integrated in a single chip and consumes an extremely small current by constituting such that a voltage limited to a fixed value is obtained from the 1st and 3rd nodes. CONSTITUTION:One end of a resistance 26 is connected to a node 11 to which a potential VDD is supplied, and the drain of an N transistor 27 is connected to the other end of the resistance 26. The source of the transistor 27 is connected to a node 13, and a bias voltage VB generated by a bias voltage generator circuit 15 is supplied to a gate. A reference voltage V1 is outputted at a connection point between the resistance 26 and the drain of the N transistor 27.
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