| 摘要 |
PURPOSE:To continuously rewrite the optional number of bits within one word from an optional bit position at high speed by providing a selecting circuit to automatically switch the number of effective write bits. CONSTITUTION:An (x) address generator 11, a (y) address generator 12, a timing control circuit 13, an L register 14, an R register 15, and a direction F/F 16 are connected to a system bus 33 and are controlled by a control processor 32. The (x) address generator, the (y) address generator 12, and an MUX 18 are connected to a bit map memory bus 34. Thus, (x) and (y) addresses from the (x) address generator 11 and the (y) address generator 12 and write bit width information 24 selected and outputted from the MUX 18 are led to a bit map memory 31 through the bit map memory bus 34.
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