| 摘要 |
PURPOSE:To improve the clamping capability of a protective diode, by providing an N<-> type diffused region between a high concentration diffused region forming a diode and a diffused region for a potential leadout terminal. CONSTITUTION:A clamping diode 4 and an equivalent resistor 5 for protecting the gate of a CMOS inverter 2 are formed by a high-concentration, N-type diffused region 12 in a low-concentration, P-type diffused region (well) 13, which is provided in a low-concentration, N-type semiconductor substrate (sub) 14. A clamping diode 6 and an quivalent resistor 7 are formed by a high- concentration, P-type diffused region 11 in the sub 14. An N-type diffused region 16 is provided in the well 13 and the sub 14 so that the region 16 is overlapped with the regions 11 aud 12. The impurity concentration of the region 16 is made higher than the impurity concentration of the well13 and the sub 14. A clamping current flows through the N<-> type diffused region 16, whose resistance is relatively small. The dynamic resistance of the diode is decreased. Thus the calmping capability of the protective diode is largely improved. |
