| 摘要 |
PURPOSE:To reduce the residual jitter by providing an automatic adjusting loop so as to oscillate an oscillator having a low Q at the bit rate frequency while an RZ input signal is interrupted thereby allowing the titled circuit to withstand the temperature change even with the small Q. CONSTITUTION:When a start signal is given, a control circuit 3 brings a control signal to ''0'', closes a gate Q1 and inputs ''0'' to a clock extracting device 1 even when any input is given. As a result, the oscillation is started at free- running. The oscillation signal is counted by a clock counter 2, compared with the input bit rate by the control circuit 3, its difference is converted into a voltage by a D/A converter 4 and impressed to a varactor diode Q3. As a result, the oscillated frequency is corrected to be the input bit rate. When the rate apparoaches a prescribed range, the control circuit 3 brings the control signal to ''1'' to introduce the RZ input signal.
|
