| 摘要 |
Each block of 64 input bits is applied to a first bank 12 of 8-bit permutation units a to h. Each permutation unit effects one out of four different permutations between 256 inputs and the 256 outputs, selection between the four possible permutations being effected by a pair of control bits unique to the permutation unit, from a 48-bit key. The 64-bits from the first bank 12 are processed in turn by a second bank 16 and a third bank 20 of permutation units j to r and s to z. There may be permutation of the bits between banks, e.g. row/column transposition as illustrated. Each permutation unit may be a 1024 by 8-bit ROM addressed by the eight input bits to the unit plus the two control bits for that unit. <IMAGE>
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