发明名称 INSTRUCTION PREFETCH OPERATION FOR BRANCH AND BRANCH- WITH-EXECUTE INSTRUCTIONS
摘要 <p>INSTRUCTION PREFETCH OPERATION FOR BRANCH AND BRANCH-WITH-EXECUTE INSTRUCTIONS A method and apparatus are described for expanding the capability of an instruction prefetch buffer. The method and apparatus enables the instruction prefetch buffer to distinguish between old prefetches that occurred before a branch in an instruction stream and new prefetches which occurred after the branch in the instruction stream. A control tag is generated each time a request for an instruction is sent to a storage. The returning instruction has appended thereto the original control tag which is then compared to the current value of control tag in the instruction prefetch buffer. If the two values match, then this is an indication that a branch has not occurred and the instruction is still required. However, if the two values or the control tag are not equal, then this is an indication that a branch in the instruction stream has occurred and that the instruction being sent from storage to the buffer is no longer required. The method and apparatus are also applicable to the use of branch-with-execute instructions wherein a subject instruction is executed immediately following the branch-with-execute instruction. The execution of this subject instruction before the branch target instruction enables the system processor to continue operating while it is waiting for the branch target instruction.</p>
申请公布号 CA1227877(A) 申请公布日期 1987.10.06
申请号 CA19850481787 申请日期 1985.05.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HESTER, PHILLIP D.;JOHNSON, WILLIAM M.
分类号 G06F9/32;G06F9/38;(IPC1-7):G06F9/38;G06F9/40 主分类号 G06F9/32
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