| 摘要 |
PURPOSE:To suppress the electric potential reduction of a high electric potential side data line in a data bus and to contrive a differential amplification with high speed by removing an output with the first and second differential amplifiers separated by a high resistance element. CONSTITUTION:Memory information on data line DB and an inversion DB is transferred to the terminals T1 and T2 of the first differential amplifying circuit 21 separated from the second differential amplifying circuit 22 through high resistance elements R1 and R2 by the elements R1 and R2. When a latch signal phi comes to be H, a differential amplification is executed at high speed and the terminals T1 and T2 come to be respectively H and L. The electric potential voltage of the terminals T1 and T2 is supplied to the circuit 22 and the differential amplification is executed within the period of the same signal phi. By a constitution separating the differential amplifier and a high resistance, the electric potential reduction of a data line at a high electric potential side in a data bus is suppressed, and by operating the first differential amplifier of a high speed action and the second differential amplifier within the same signal period, a differential amplifying action is executed at the high speed.
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