发明名称 ASYNCHRONOUS DATA BUS INTERFACE
摘要 PURPOSE:To attain the highly efficient transfer of data without requiring many procedures by using the control signal received from a digital electronic device to control a latch where the input and output sides are independent of each other and performing transfer of data when the prescribed conditions are satisfied. CONSTITUTION:Data are transferred between two digital electronic devices 1 and 2. A latch 4 where the input and output sides are independent of each other is used as a temporary data holding circuit in case the time width of the write signal delivered from the device 1 is larger than the time width of the read signal delivered from the device 2 or such conditions can be satisfied. A control circuit 3 controls the latch 4 by means of the write and read signals delivered from devices 1 and 2 respectively.
申请公布号 JPS62226260(A) 申请公布日期 1987.10.05
申请号 JP19860069644 申请日期 1986.03.27
申请人 TOSHIBA MACH CO LTD 发明人 UTSUKI YOSHIAKI
分类号 G06F13/38;G06F13/42 主分类号 G06F13/38
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