| 摘要 |
PURPOSE:To prevent the effective capacity of an access to a main storage, which exists in a conventional information processing system from being lowered, by providing a register update displaying bit, and stopping the unnecessary save of a register in which no updating has been performed since a load from the main storage, to the main storage. CONSTITUTION:The titled device is constituted of a control storage 10, a control storage register 11, a control storage address register 12, a register file 20, a register update displaying bit 21, a register address register 22, an adder 23, a work register 30, a shifter 31, a flag 32, a comparator 33, a memory address register 40, and a memory address adder 41. The register update displaying bit 21 is the assembly of data of one bit corresponding to the register file 20, and then the update of a corresponding register is detected, it is set at 1. The whole of the register update displaying bit can be read out on the work register 30.
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