| 摘要 |
<p>PURPOSE:To make it possible to readily satisfy the requests for various specifications by executing the write and control of data to a ROM hardware- wise and independent of a CPU, and setting the CPU in a waiting state during the action of writing on the ROM. CONSTITUTION:During the process of executing a user program written in an EEP-ROM 4, if need for writing a data necessary to be stored in the ROM 4 is generated, the CPU 1 saves, into a register, the address of a memory in which the instruction to be executed next is stored, then issues a write instruction and, data and an address. A write control circuit 7 latches the address and the data, activates a signal BSY, and connects a specified-code data generating circuit 9 to the CPU 1 after a switching circuit Sx cuts off the ROM 4 from the CPU 1. The CPU 1 executes the instruction represented by specified- code data Is, repeats jumping to specified addresses, then enters an idling state. The circuit 7 executes the write control action against the ROM 4 separated from the CPU 1 independently of the CPU 1.</p> |
