| 摘要 |
<p>PURPOSE:To eliminate expensive PROM writer on programming and verifying of an integrated PROM by internally providing an address signal generating circuit, a timing signal generating circuit, a writing pulse generating circuit and a data comparison circuit. CONSTITUTION:The device consists of the address signal generating circuit 2, the PROM 3, the timing signal generating circuit 4, the writing pulse generating circuit 5, the data comparator 6, an address bus 7, a data bus 8, a memory control terminal 9, an input terminal 10, an output terminal 11 and a verify output terminal 12. When the input terminal 10 goes to an active level at the timing of T1, the output terminal 11 is brought into the active level ('1') at the timing of T2 and the operating for programming and verifying is informed externally. The programming and verifying is completed by repeatedly addressing from T3 to T11 on all the addresses of the PROM 3.</p> |
