| 摘要 |
PURPOSE:To shorten a memory test by simultaneously writing plural bits consisting of optional bit patterns by plural input and output circuits. CONSTITUTION:The plural input and output circuits DI, DO making an address terminal an external terminal to plural common data lines are provided in a dynamic type RAM of X1 bit constitution consisting of the first address selection circuit for transmitting plural data lines respectively to the plural corresponding common data lines by the selection operation of word lines and data lines according to a specific address signal on the address signals supplied from the external terminal and the second address selection circuit for transmitting the plural common data lines to one input and output circuit by the decode output of a remaining address signal. By a control signal supplied from the external terminal or the combination thereof, the memory access for one bit unit or plural bit unit is changed over. Thereby, the memory test can be shortened.
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