| 摘要 |
A power on reset and watchdog circuit for a microprocessor (IC1) inhibits operation of the microprocessor for a predetermined period of time on initial application of power and thereafter enables the microprocessor as long as it receives an appropriate signal (pin 2 of IC1) from the microprocessor indicating normal operation. If this signal fails, the microprocessor is reset. Two circuits can be used with additional logic gates with a pair of microprocessors such that only one is enabled when power is first applied, and if this should fail to operate subsequently the second is enabled and the first inhibited. <IMAGE> |
