| 摘要 |
PURPOSE:To reduce the number of image memories and that of image buses by reading images stored at even addresses in an image memory and images stored at odd addresses in the same image memory alternately and continuously and calculating images. CONSTITUTION:The image A is stored at the even address in the RAM 52 of the image memory 31, while the image B is stored at the odd address in the RAM 52. When a mode to alternately read the images A and B at every picture element is specified, selectors 55 and 56 controlled by a controller 51 make the action clock of an address counter generating an address except for the lower-most bit of an address in the RAM 52 into a clock signal CLK2 obtained in such a way that an F/F 54 frequency-divides a clock signal CLK1 by 2, and both the lower-most bit of the address in the RAM 52 and a clock signal CLK are supplied. As a result the picture element A and B are alternately read out of the RAM 52, and transferred to an inter-picture element arithmetic processor 33, which operates two images.
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