发明名称 INDIVIDUAL SIGNAL INSERTING SYSTEM
摘要 PURPOSE:To eliminate the generation of out of synchronism in an opposite station by multiplexing between voice data and an individual signal by a clock signal of a digital transmission line system to synchronize accurately a frame synchronization bit in a multiplexed frame with a clock signal of the transmission line system. CONSTITUTION:A relay line signal device 10 inserting an individual signal to a frame including voice data and transmission line is provided with the 1st buffer memory 12 synchronizing the phase of voice data with a clock signal CLr of the digital transmission line 11 and the 2nd buffer memory 13 synchronizing the phase of individual signal with the clock signal CLr of the line 11. Outputs of the buffer memories 12, 13 are multiplexed by a multiplexer 14 by using the clock signal CLr of the line 11. Thus, in inserting the individual signal bit of a time slot TS0, after the phase of the voice data and individual signal is synchronized with the clock signal of the digital transmission line, the insertion is executed b using the clock signal of the digital transmission line to prevent out of synchronism of the frame synchronizing bit and multi- frame synchronizing bit.
申请公布号 JPS62222757(A) 申请公布日期 1987.09.30
申请号 JP19860059475 申请日期 1986.03.19
申请人 FUJITSU LTD 发明人 YAMAMOTO TAKAYA
分类号 H04M7/00;H04Q11/04 主分类号 H04M7/00
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