| 摘要 |
<p>A dynamic RAM comprises a sense amplifier (SA) and a restore circuit (RE1) for each pair of divided bit lines (BL1, BL1, BL2, BL2). Sense operation can be performed in a fast and stable manner and the gate voltage (T) of a transfer gate transistor (QT) need not be boosted over the power supply potential, so that the access time of the dynamic RAM can be reduced, operation margin thereof is increased, and reliability is improved.</p> |
