| 摘要 |
<p>Logical NAND circuits, each consisting of a logical operational portion (21), an output control portion (25) comprising the combination of a bipolar transistor (43) and a plurality of NMOS transistors, and an output portion (23) comprising first and second bipolar transistors (37, 39) connected in series between power supply voltage and the ground in which the merits of the MOS transistors and the bipolar transistors can be demonstrated by the particular combination of the two different kinds of the transistors in the logical circuit, thereby increasing the current driving performance while reducing power consumption without making the size of the logical circuit large.</p> |
