发明名称 CMOS INVERTER CIRCUIT FOR DELAY
摘要 PURPOSE:To decrease the change in the delay due to the fluctuation of power voltage by operating a CMOS inverter circuit while using a constant current circuit comprising MOSFET as a current source in a semiconductor integrated circuit using insulation gate field effect transistor (TR) MOSFET. CONSTITUTION:Gates comprising a P-channel MOSFET 11 and an N-channel MOSFET 12 are connected together to form an input terminal as a CMOS inverter. Further, a depletion type is used for an N-channel MOSFET 13 and the current I1 flowing to the MOSFET 13 is expressed as I1=(1/2)beta.(VTND)<2> because the source and gate of the MOSFET 13 are both connected to -VSS, where beta is a conductance constant and -VTND is a threshold voltage. That is, the current flowing to the MOSFET 13 is constant independently of the fluctuation of power voltage. Since the CMOS inverter circuit comprising the MOSFETs 11, 12 uses the MOSFET 13 as the constant current source, the response speed, that is, the delay time is constant independently of the power voltage.
申请公布号 JPS62222713(A) 申请公布日期 1987.09.30
申请号 JP19860066423 申请日期 1986.03.25
申请人 SEIKO EPSON CORP 发明人 HASHIMOTO MASAMI
分类号 H03K5/13;H03K5/133;H03K5/134;H03K19/094;H03K19/0948 主分类号 H03K5/13
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