发明名称 MONITOR CIRCUIT FOR LOGICAL UNIT
摘要 PURPOSE:To obtain a monitor circuit for logical unit that can easily collect the sufficient data for study of the factor of abnormality, by connecting a monitor circuit containing a monitor processor, a local memory, a trace memory, a communication adaptor, etc. directly to the main bus of a device to be monitored. CONSTITUTION:The optimum monitor items are set by a microprogram in response to the hardware constitution of a logical unit 1. A WDT circuit 16 receives an access when a main processor 21 carries out a specific instruction in a working mode of the unit 1. If no access is supplied to the circuit 16 within a fixed time and no occurrence of abnormality is detected, the circuit 16 applies interruption to a monitor processor 11. While a trace memory control circuit 15 stops the tracing action to a trace memory 14 and outputs the data stored in the memory 14 to an external device 2 via a communication adaptor 13 and a communication line 19. The data output of the memory 14 is carried out via the circuit 19 and the unit 1 continues its working with no discontinuation of the normal operation.
申请公布号 JPS62221043(A) 申请公布日期 1987.09.29
申请号 JP19860063604 申请日期 1986.03.20
申请人 NEC CORP 发明人 KONISHI YASUTOMO
分类号 G06F11/34;G06F11/30 主分类号 G06F11/34
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