BUS SYNCHRONIZATION COLLATING SYSTEM FOR MICROCOMPUTER

摘要

PURPOSE:To avoid a system breakdown due to a temporary noise by resetting the stop output of a collation signal at every counting of discordance of data until the prescribed permission frequency of discordance is attained and then delivering again the collation signal. CONSTITUTION:When the discordance of data is produced on a bus between microcomputers 1 and 2 and the collation signal of a collation circuit 3 is stopped, no output of a waveform converting circuit 6 is delivered any more. Thus a NOT gate 8 has an output of '1'. A fail-safe counter 5 decreases the counted value of the preset discordance permission frequency by 1 with the input of a single clock pulse. At the same time, the counter 5 outputs a single reset pulse to reset the collating action of the circuit 3 via an OR gate 9. This action is repeated every time a clock pulse is received and no counting action is carried out any more when the discordance permission frequency is decreased down to 0. Thus no reset pulse is delivered as well. Thus the circuit 3 stops continuously the collation signal.