发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To prevent such a trouble where the interruption signal is cleared by mistake by using an address selection detecting circuit which does not decide that a specific address is selected before the selecting period is equal to a prescribed time interval. CONSTITUTION:An address selection detecting circuit 21 which produces the signal to clear the interruption signal INT(R) contains a circuit 210 which produces the signal phi(R) to prevent the clearing of the signal INT(R). The normal selection of an address is not decided before the address selecting period is equal to a prescribed time interval. For instance, the interruption signal is outputted to a port at one side at the time of the prescribed data is written to a specific address via the other port. Furthermore it is not regarded that the specific address is selected before the selecting period of the specific address set by a port is equal to the prescribed time interval even though the other port is set under a reading mode.
申请公布号 JPS62221747(A) 申请公布日期 1987.09.29
申请号 JP19860059463 申请日期 1986.03.19
申请人 FUJITSU LTD 发明人 AOYAMA KEIZO
分类号 G11C11/401;G06F12/00;G06F15/16;G06F15/167 主分类号 G11C11/401
代理机构 代理人
主权项
地址