发明名称 Error monitor circuit
摘要 A multi-value signal monitor circuit in a data transmitting and receiving system which transmits data after conversion into a multi-value signal and obtains the original data through analog-to-digital conversion of the received multi-value signal. The data is converted more accurately than the number of bits of data transmitted, during the analog-to-digital conversion on the receiving side. The position of the received signal relative to the quantization level is determined by utilizing the extra bits. When the extra bits indicate the multi-value signal is outside the specified range of the quantization level a pseudo error is detected. The pseudo errors are counted to produce a pseudo error rate which is used as an error rate for transmission path switching purposes.
申请公布号 US4697265(A) 申请公布日期 1987.09.29
申请号 US19850740326 申请日期 1985.06.03
申请人 FUJITSU LIMITED 发明人 NOZUE, YOSHIHIRO
分类号 H03M13/00;H04L1/24;H04L25/49;H04L27/34;H04L27/38;(IPC1-7):G08C25/00;G06F11/00 主分类号 H03M13/00
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