发明名称 TELETEXT RECEIVER
摘要 PURPOSE:To minimize the number of times of error correction, by adding a counting circuit which counts the number of times of the error correction, and a circuit which controls a time that counts the number of times of correction, and controlling the phase of a sampling clock for character signal sampling based on a counted output. CONSTITUTION:At a timer 18, a pulse phi1 which represents one field, or intervals of n-number of fields, is formed, and a counter 15 counts how many times of error correction has been performed in the period of the pulse phi1. As the first time at t13-t20, since a memory 16 is vacant, when an error, for example (x)scs. of errors exist, the (x)pcs. are written on the memory 16, and the phase of the sampling clock is shifted by one. Next, the number of times of error correction are counted again between t23-t30, and if they are (y)scs., the (x) and the (y) are compared at a comparison circuit 17, and when it is (x)>(y), the phase of the sampling clock is shifted in the same direction furthermore, and when it is (x)<(y), the phase is returned by one. In this way, the phase of the sampling clock can be fitted for the optimum position, and the number of times of the error correction can be suppressed at the minimum level, and a slice level can be set at the optimum level automatically.
申请公布号 JPS62219785(A) 申请公布日期 1987.09.28
申请号 JP19860062151 申请日期 1986.03.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRASHIMA MASAYOSHI
分类号 H04N7/025;H04N7/03;H04N7/035;H04N7/08 主分类号 H04N7/025
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