发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enable upper diffused layers to be made shallow and to signicantly enhance the integration degree of the titled integrated circuit inhibiting the lateral diffusion of the upper diffused layers by a method wherein, after the lower diffused layers are made to creep up in advance over half of the thickness of an epitaxial layer, the upper diffused layers are formed. CONSTITUTION:The lower diffused layers 4 of vertical isolation regions 3 are diffused being made to creep up over half of the thickness of an epitaxial layer 5 by applying a 2hr heat treatment to a whole substrate 1 at about 1,200 deg.C, and at the same time, the base region 6 of an IIL is driven in. Then, the upper diffused layers 7 of the vertical isolation regions 3 are selectively diffused from the surface of the epitaxial layer 5, coupled with the lower diffused layers 4 and first and second island regions 8 and 9 are formed. The upper diffused layers 7 can be made shallower in about 3mum without being limited by the base region 6. Thereby, the lateral diffusion of the upper diffused layers 7 can be inhibited to about 3mum and the surface occupation areas of the vertical isolation regions can be significantly reduced.
申请公布号 JPS62219556(A) 申请公布日期 1987.09.26
申请号 JP19860062452 申请日期 1986.03.19
申请人 SANYO ELECTRIC CO LTD 发明人 TABATA TERUO
分类号 H01L21/8226;H01L27/02;H01L27/082 主分类号 H01L21/8226
代理机构 代理人
主权项
地址