| 摘要 |
PURPOSE:To detect surely patterns A, B by obtaining a mean value for the share of 2 clocks obtained by doubling an output frequency of a roll-off filter every X, Y components, and inputting the result to a DC component detection circuit. CONSTITUTION:An output of roll-off filters 4a, 4b is selected as 4,800Hz, its output is inputted respectively to arithmetic units 6a, 6b, divided into 1/2 and adders 8a, 8b add the result with a signal delayed by one clock by delay circuits 7a, 7b to obtain a mean value. The mean output is inputted to a DC component detection circuit 5. In applying the processing, the signal points of A. B become A', B', and this state is always obtained independently of the locking of the timing, then the timing component is obtained always in receiving the patterns A, B so as to detect surely the patterns A, B. |
