| 摘要 |
An emitter-coupled multiplexer has all transistors directly controlled by one select signal in parallel with transistors directly controlled by other select signals. Thus, in a 3:1 multiplexer (100), a first select signal (S0) directly controls one transistor (Q13); this transistor is in parallel with another transistor (Q14) which is directly controlled by a second select signal (S1). The second select signal also directly controls another transistor (Q15) in the same network (102). This transistor is in parallel with a transistor directly controlled by an input signal (I1) which is thus masked when the second select signal is activated. The second select signal also controls (at Q16 and Q18) subnetwork selection in another current network (104) of the multiplexer. The disclosed arrangement permits the multiplexer function to be implemented with a reduced transistor count and only two current sources in two-level series gating.
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