| 摘要 |
PURPOSE:To contrive the reduction of the area of an integrated circuit with the reduction of a redundant circuit and also to attain the fast arithmetic processing, by using the 1st and 2nd exclusive encoding circuits to form an encoding circuit part related to a critical path. CONSTITUTION:The multiplicands X(x0-Y7) are supplied to a multiplication array part consisting of basic cells 101-136. While the multipliers Y(y0-y7) are supplied to the 1st encoding circuit 137 which decides the encoding value corresponding to the value of a group of bits where the multipliers are divided at every 2 bits as well as to the 2nd encoding circuits 138-140 which decide the encoding value corresponding to the value of bits where the multipliers are divided at every 3 bits respectively. Then the circuits 137-140 and the multiplication array part carry out successively the production of partial products and the addition of these products based on the secondary booth algorithm. Finally both adders 141 and 142 add the carry and the sum of each of bit of the final partial product and the data T00-T14 on the results of multiplication are outputted. |
