发明名称 DATA PROCESSOR
摘要 PURPOSE:To reduce the overhead by using a means which switches the 1st and 2nd means during a single input/output request and performing the transfer of data between an external memory device and an extended memory device via the 2nd means only to a specific command received during the single input/ output request. CONSTITUTION:A subchannel 4 contains a control bit 5 to transfer data to an extended memory device 15; while a subchannel 11 has a control bit 12 which does not transfer data to the device 15. When data are transferred between an external memory device 13 and a memory device with a prescribed specific command, a data transfer line 6 is used for transfer of data to the device 15. While a data transfer line 7 is used for the transfer of data to a main memory 16 with another command. Furthermore a data transfer line 9 is always used for transfer of data to the memory 16 when data are transferred between a memory device and an external memory device 14 connected to the subchannel 11.
申请公布号 JPS62212744(A) 申请公布日期 1987.09.18
申请号 JP19860054703 申请日期 1986.03.14
申请人 HITACHI LTD 发明人 MIYADERA HIROO
分类号 G06F12/08;G06F12/00;G06F12/10;G06F13/12 主分类号 G06F12/08
代理机构 代理人
主权项
地址