发明名称 MEMORY ACCESS CONTROLLING DEVICE
摘要 PURPOSE:To realize various operation of data and independent memory access at high throughput by controlling memory access and address and data operation independently and dispersedly keeping interrelation between them. CONSTITUTION:A data register 100 transmits address information, instruction information including identifiers indicating reference or updating and updating data or transfer data as packet information constituted of one word. Address information is address operated in accordance with the identifier or instruction, or according to updating data already read out and processed, and as soon as processing of an address operating section 400 is completed, memory access is started in accordance with the identifier or instruction. In case of writing mode, updating data are written and in case of reading mode, memory data are read to a data operating section 600, and the data are processed according to the instruction.
申请公布号 JPS62211749(A) 申请公布日期 1987.09.17
申请号 JP19860055960 申请日期 1986.03.12
申请人 SHARP CORP;MATSUSHITA ELECTRIC IND CO LTD;SANYO ELECTRIC CO LTD;MITSUBISHI ELECTRIC CORP 发明人 TERADA HIRONORI;ASADA KATSUHIKO;NISHIKAWA HIROAKI;MIYATA SOICHI;MATSUMOTO SATOSHI;ASANO HAJIME;SHIMIZU MASAHISA;MIURA HIROKI;SHIMA KENJI;KOMORI NOBUFUMI
分类号 G06F15/82;G06F12/00;G06F12/02;G06F13/16 主分类号 G06F15/82
代理机构 代理人
主权项
地址