| 摘要 |
PURPOSE:To improve a processing capacity with a good balance and efficiently, by providing two CPUs having local memories within their base processor elements, and operating them as if one processor. CONSTITUTION:A CPU 15 performs a main control arithmetic, and a CPU 16 performs a backup for the CPU 15 by performing an intelligent process based on a data base, or a bit of sensor information at a background. When the necessity of a communication between the CPUs 15 and 16 is generated, the CPU 16 writes a message on a dual port RAM (DPR) 17. Based on the message, an interruption to the CPU 15 is generated, and the DPR 17 is accessed from the CPU 15, thereby the communication of a bit of required information being performed. Next, when the necessity of the communication between the CPU 16 and other base processor element (BPE) is generated, the CPU 16 requests a right to use a shared bus 12 to the processor 15, and accesses through a shared switch control circuit 22. Thus, two CPUs are operated, thereby, the processing capacity can be improved.
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