发明名称 |
Power on reset & watchdog circuit |
摘要 |
A power on reset and watchdog circuit for a microprocessor (IC1) inhibits operation of the microprocessor for a predetermined period of time on initial application of power and thereafter enables the microprocessor as long as it receives an appropriate signal (pin 2 of IC1) from the microprocessor indicating normal operation. If this signal fails, the microprocessor is reset. Two circuits can be used with additional logic gates with a pair of microprocessors such that only one is enabled when power is first applied, and if this should fail to operate subsequently the second is enabled and the first inhibited. <IMAGE> |
申请公布号 |
GB2187909(A) |
申请公布日期 |
1987.09.16 |
申请号 |
GB19870005635 |
申请日期 |
1987.03.10 |
申请人 |
* LAKE ELECTRONIC TECHNOLOGIES LIMITED |
发明人 |
MICHAEL * O'CONNOR;JOHN MARY * WALTERS |
分类号 |
G06F11/00;G06F11/14;G06F11/20;H03K17/22;(IPC1-7):H03K17/22;G06F11/30 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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