| 摘要 |
PURPOSE:To suppress the occurrence of a harmful spurious signal and to execute the phase locking short in pull-in time by assembling two phase lock loops. CONSTITUTION:While the first phase lock loop 32a and the second phase lock loop 32b are respectively locked, the phase of an output signal G is synchronized with the phase of an output signal B, and therefore, a step-shaped ripple will not occur. Consequently, since at a low area filter 36a of the first phase lock loop 32a, the component of a reference frequency fR is sufficiently suppressed, the interrupting frequency can be comparatively highly set and a desired short pull-in time can be obtained. In the second phase lock loop 32b, the spurious component of a voltage control oscillator 38b is frequency-divided by a variable frequency-divider 40b and compressed to about 1/N. Since the phase change having a comparatively high frequency component mixed from the variable frequency-dividing circuit 40b to the first phase lock loop 32a is sufficiently suppressed, the output signal having a desired output frequency f0 can be generated.
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