发明名称 INPUT ERROR DETECTION CIRCUIT FOR FREQUENCY PHASE COMPARATOR
摘要 PURPOSE:To directly detect an error in a reference signal regardless of the constitution of a frequency comparator, and the duty of the reference signal, by detecting the turbulence of the reference signal dividing it into three modes: a mode of ultra short cycle, a mode of short cycle, and a mode of long cycle. CONSTITUTION:An ultra short cycle detection circuit 7, when a reference signal SVC including a pulse of ultra short cycle being short of the one cycle of a clock SCL is inputted, detects the error. A pulse forming circuit 8 sends out a detecting timing of ultra short cycle and a detecting data of long and short cycle. A long and short cycle detection circuit 9 detects the error when a pulse having the cycle longer than the one cycle of the SCL, but shorter than the cycle of the SVC, and when the pulse having longer than the cycle of the SVC, is inputted. By such a constitution, the error is detected respectively for each of the three modes of the SVC based on the SCL sent from a voltage controlled oscillator 6. A detection circuit 7 uses two stages of flip-flops, and is set at a respective timing generated by the pulse forming circuit 8, and it is decided as the error unless a prescribed sequence is generated, and the detection circuit 9 counts the cycle with the SCL faster than the SVC, it is decided as the error unless a prescribed value is obtained.
申请公布号 JPS62210730(A) 申请公布日期 1987.09.16
申请号 JP19860054219 申请日期 1986.03.12
申请人 FUJITSU LTD 发明人 HASHIMOTO SHUICHI
分类号 H03K5/26;H03L7/08;H03L7/085 主分类号 H03K5/26
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