发明名称 OUTPUT BUFFER CIRCUIT SYSTEM
摘要 PURPOSE:To prevent the generation of current noise in other output signal in the simultaneous changeover of a bus signal or the like by adopting the push-pull constitution comprising two N-channel MOS TRs for the final stage TRs of an output buffer and generating a high level of a pre-stage circuit driving the gate of the power supply side MOS TRs from other power supply. CONSTITUTION:The two N-channel output buffer TRs 2, 3, are connected in series to form push-pull constitution and a connecting point between the source and drain is used as an output. The drain of the TR 2 is connected to a power supply VDD2 and the inverter 4 of the pre-stage is fed from the power supply VDD1. The same waveform is inputted to lots of bus inputs A1-An and outputs B1-Bn are driven simultaneously, then current noise is invaded in power supplies DD2 and SS in the inside of a semiconductor, but the noise of the power supply DD1 of the inverter 4 is very small. Thus, control pulses C1, C2 are brought normally into a high level and the signals C1, C2 go to a low pulse, then the time phase between both the switching is not overlapped at the simultaneous changeover of the buses thereby preventing no current noise to the outputs D1, D2.
申请公布号 JPS62210725(A) 申请公布日期 1987.09.16
申请号 JP19860052432 申请日期 1986.03.12
申请人 HITACHI LTD 发明人 YAMAGIWA AKIRA
分类号 H03K17/16;G11C11/401;G11C11/409;H03K17/687;H03K17/693;H03K19/00;H03K19/003;H03K19/0175 主分类号 H03K17/16
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