发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent a parasitic thyristor from being turned ON and reaching latch-up and avoid breakdown of a semiconductor device by providing a voltage level detector, a voltage generator, an internal circuit and a delay circuit. CONSTITUTION:A voltage level detector 1 which detects the level of the voltage supplied from a voltage supply source, a voltage generator 3 which supplies a voltage to a semiconductor substrate so as to set the semiconductor substrate at the predetermined potential, an internal circuit which is operated by an internal source voltage and a delay circuit 2 which is controlled to operate by the voltage level detector which detects the voltage of the voltage supply source when it reaches a certain voltage level and delays the supply of the internal source voltage from the voltage supply source to the internal circuit are provided. By lowering the substrate potential to the predetermined level before the voltage is supplied to the internal circuit, latch-up of a parasitic thyristor caused by the ascent of the substrate potential at the time of the source closing can be avoided.
申请公布号 JPS62209846(A) 申请公布日期 1987.09.16
申请号 JP19860051957 申请日期 1986.03.10
申请人 FUJITSU LTD 发明人 ADACHI KAZUHIRO
分类号 H03K17/22;G11C11/407;H01L21/822;H01L27/04;H01L27/10;H03K17/28 主分类号 H03K17/22
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