| 摘要 |
PURPOSE:To improve integration density, by arranging a plurality of transistor groups and a plurality of load element in the column direction in a specified sequence, and arranging a plurality of programmable logic arrays in the row direction. CONSTITUTION:A plurality of transistor groups forming each programmable logic array and a plurality of load elements are arranged in the column direction in a specified sequence. The programmable logic arrays are arranged in the direction of a row. For example, four sets of unit columns are arranged in the lateral direction, and the elements are interconnected. Thus one programmable logic array PLA circuit is formed. The AND matrix of the PLA is constituted by a unit column 23 and a first MOSFET column 24. The OR matrix of the PLA is constituted by a first load element 25 and a second MOSFET column. The AND matrix of the PLA is constituted by a second load element 27 and a third MOSFET column 28. Thus the PLA is constituted by the two AND matrixes and one OR matrix. |
