发明名称 DETECTING SYSTEM FOR END OF TRANSFER
摘要 PURPOSE:To increase the communication speed and to attain the fast transfer of data by detecting the end of reception in case all characters received within a fixed period of time are equal to the specific data. CONSTITUTION:A DMA control means 2 transfers the data of variable length to a memory part 1 and the end of this data transfer is detected at every time the prescribed period of time is counted by a time counting means 3 which starts its counting action as soon as the transfer of data is started. Here a transfer end detecting means 4 detects the end of the data transfer when all characters received within a fixed period of time are equal to the specific data.
申请公布号 JPS62209645(A) 申请公布日期 1987.09.14
申请号 JP19860052067 申请日期 1986.03.10
申请人 CASIO COMPUT CO LTD 发明人 OTSUKA TETSUO
分类号 G06F13/00;G06F13/28;G07G1/14;H04L29/08;H04L29/10 主分类号 G06F13/00
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