| 摘要 |
PURPOSE:To effectively utilize an input/output device by coupling plural micro- processors with an internal bus coupled with memories and the I/O device through plural bus interfaces and operating the microprocessors successively and asynchronously. CONSTITUTION:Respective emulator CPUs 11-1n are coupled with the body CPU internal bus 10 through bus interfaces 1-(n) and a ROM 41, a RAM 42, a DMA 43, a video RAM 44, and the I/O device group 45 are connected to the bus 10. The device group 45 is shared by all the CPUs 11-1n, bus a CPU for executing I/O access is fixed only one of the CPUs 11-1n and sequentially and asynchronously operated. When an I/O access request is generated in a program in executing, a slave CPU is replaced by a master CPU and the I/O access is executed by the master CPU. Thus, the sharing use of the I/O device group 45 between the CPUs having different structure each other can be attained independently of the transmission/reception of an instruction and response data.
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