| 摘要 |
<p>PURPOSE:To reduce the number of signal wirings by providing a decoder circuit which hierarcally switches and controls a switch element included in a switch circuit and conducts the prescribed data line to the input terminal of a sense amplifier. CONSTITUTION:R1 and R2, RS, CD, and C1 and C2 denote the on-resistance of a column switch MOSFET, the on-resistance of a MOSFET in the sense amplifier, data line capacity, and the stray capacity of the 1st and 2nd common lines, respectively. Where the capacity of the MOSFET and the number of MOSFETs are (n) and (m), respectively, (m/n)=(RS+R2)/(RS.K) shows the condition for minimizing a delay time tau. If a proportional constant K is '1' and if the RS is about half the on-resistance of the 1st column selection MOSFET and its resistance ratio is larger than that of the constant K, (m)/(n) is larger than '1', and the 1st column selection MOSFET is preferably smaller tan the 2nd column selection MOSFET. Thus the number of signal wirings for a selection signal supplied to the switch circuit can be reduced.</p> |
