发明名称 FDD INTERFACE CIRCUIT
摘要 PURPOSE:To correctly identify a data transferring speed at a host system side by output-controlling a read data pulse in accordance with a read data pulse gate signal and providing a gate circuit to send it to a frequency variable oscillator. CONSTITUTION:Between an Floppy Disk Drive FDD 1 and a frequency variable oscillator 2, a read pulse gate circuit is inserted. A read pulse gate circuit 6 measures the pulse interval of a read data pulse 10 outputted from the FDD 1, output-controls the read data pulse 10 in accordance with a read data pulse gate signal outputted with the setting interval in accordance with the data transferring speed mode set by a changing-over circuit 4 as a unit and sends it to a Variable Frequency Osillator VFO 2. The VFO 2 outputs a read data signal 11 and a window signal 12 based on a passage read data pulse 20 from the read pulse gate circuit 6 and a changing-over signal 13 to show the data transferring speed mode set at the changing-over circuit 4.
申请公布号 JPS62208458(A) 申请公布日期 1987.09.12
申请号 JP19860050417 申请日期 1986.03.10
申请人 TOSHIBA CORP 发明人 NAKAMURA NOBUTAKA
分类号 G06F3/06;G11B19/02;G11B19/12 主分类号 G06F3/06
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