| 摘要 |
PURPOSE:To prevent the transformation of data that is caused by a trouble of a set signal generating circuit by using a circuit which checks whether a set signal is outputted or not and decides the contents of a register are erroneous if no set signal is outputted. CONSTITUTION:The information delivered from a central processing unit CPU1 is outputted to the 1st register 3 via a signal line 3'. The register 3 stores said information when the output is received from a reset signal generating circuit 2 which is driven by the action command signal supplied from the CPU1. The output of the circuit 2 is also set to the 2nd register 8 which is updated in the system clock cycle. A check circuit 40 outputs an error signal if the register 8 has no set signal in a check mode of the contents of the register 3. Thus the error signal is outputted even in such a case where the circuit 2 has a trouble and outputs no set signal. In such a way, the transformation of data is prevented. |
