发明名称 REUSE SYSTEM FOR LOGIC CIRCUIT
摘要 PURPOSE:To improve the designing efficiency for reuse of the hardware logic, etc., which cause the extension of a function, by attaining the automatic conversion of a circuit system and the automatic conversion of logic level into a function logic from a gate logic. CONSTITUTION:When the normal gates 202-206 are formed into a single mod ule, an output signal line 241 of the gate 205 serves as a cut end input signal line. These signal lines form a loop via an amplifier gate 200. Here the logic division 230 is carried out to suppress occurrence of said loop. In case the division 230 is equal to a standard logic, a module is produced for macrologic description. While a module for function logic description is produced if the division 230 is not equal to a standard logic. Then the proper conversion is carried out between circuit system and the same module is transformed into the multiplex expression. Then the information n the function logic drawing is added to each module and written into a function logical file.
申请公布号 JPS62206672(A) 申请公布日期 1987.09.11
申请号 JP19860048394 申请日期 1986.03.07
申请人 HITACHI LTD;HITACHI SOFTWARE ENG CO LTD;HITACHI COMPUT ENG CORP LTD 发明人 NIIYA TAKAO;KUBO TAKASHIGE;OIDA ATSUSHI;OZAWA YASUSHI;KOSHISHITA JIYUNJI;IKARIYA YUKIO;TSUCHIYA HIROTSUGU;UEMATSU SEIYA
分类号 G06F17/50 主分类号 G06F17/50
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