发明名称 PHASE ERROR DETECTION CIRCUIT
摘要 PURPOSE:To improve the transmission quality and reliability by detecting a control signal controlling the oscillation frequency of a voltage controlled oscillator of a phase locked loop (PLL), comparing the signal with a reference voltage and outputting an alarm signal so as to detect the increase in a phase error even with the PLL in the locking state. CONSTITUTION:A control signal detection circuit 2 detects a control signal VC controlling the oscillated frequency of the voltage controlled oscillator 14 and a comparator circuit 3 outputs an alarm signal VA when the output voltage of the control signal detection circuit 2 exceeds a preset reference voltage VR within the frequency holding range of the PLL 1. The circuit 2 acts like an absolute value circuit with the relation of VD=V>=C at VC>0, VD=-VC at VC<0, that is VD=VC in the relation of resistors R1=R2=R3=2R4=R5. The comparator circuit 3 having an amplifier 31 compares the voltage VD with the reference voltage VR and when the voltage VD exceeds the reference voltage VR, the alarm signal VA is outputted.
申请公布号 JPS62207026(A) 申请公布日期 1987.09.11
申请号 JP19860049643 申请日期 1986.03.07
申请人 NEC CORP 发明人 WATANABE KYOJI
分类号 H03L7/095;H03L7/08 主分类号 H03L7/095
代理机构 代理人
主权项
地址