发明名称 INTERFACE SYSTEM
摘要 PURPOSE:To share the port of an input/output to one input port and one output port by sharing a data bus with plural interface signals and holding only a flag by the number of the interface signals. CONSTITUTION:When the data at a module B are outputted from a module A, an output port is selected in accordance with the contents of the data, and simultaneously, two output ports or above are not selected. Even in case of the data input, two ports or above are not selected. An inter-module interface part can be composed of one input port and one output port. To inform an opponent module of the contents of the processing to be requested, plural flags 21-24 are prepared. When the module A is a command port, a data port is an output port, the module B is a response port and the data port is the output port and they are arranged by two ports 11 and 12, the constitution like a figure can be obtained.
申请公布号 JPS62205460(A) 申请公布日期 1987.09.10
申请号 JP19860049374 申请日期 1986.03.06
申请人 RICOH CO LTD 发明人 TANAKA SHIGETAKA
分类号 G06F13/42 主分类号 G06F13/42
代理机构 代理人
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