发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To keep a sequential characteristic and to execute a parallel processing by being equipped with a port for a grouped bank and providing a register to hold an address corresponding to respective ports and a checking circuit to investigate a bank using condition. CONSTITUTION:An address register 1 sends out a part of an address to a control circuit 2 by a line 101 and sends out a remaining address to address holding registers 3-0-3-3 by a line 102. The registers 3-0-3-3 send out an address held at memory modules 6-0-6-3 by lines 301-304 and send out a part of the address to bank checking circuits 5-0-5-3. Circuits 5-0-5-3 investigate the using condition of a bank which the address set to the registers 3-0-3-3 accesses, when the bank is not used, a request signal to the memory is sent out and the circuits have the function to register the bank which comes to be newly the using condition.
申请公布号 JPS62205453(A) 申请公布日期 1987.09.10
申请号 JP19860049191 申请日期 1986.03.06
申请人 NEC CORP 发明人 KAJI NAOTO
分类号 G06F12/00;G06F12/06;G06F17/16;G11C7/00;G11C11/34 主分类号 G06F12/00
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