| 发明名称 |
Selective electroless plating of vias in vlsi devices. |
| 摘要 |
<p>Selective electroless plating of cobalt or nickel is utilized to form conductive plugs (42, 44, 46) in high-aspect-ratio vias (36, 38, 40) in VLSI devices. Particularly good results are obtained when an active or catalytic film is formed on the via bottoms to serve as a plating base.</p> |
| 申请公布号 |
EP0236034(A2) |
申请公布日期 |
1987.09.09 |
| 申请号 |
EP19870301519 |
申请日期 |
1987.02.23 |
| 申请人 |
AT&T CORP. |
发明人 |
GEORGIOU, GEORGE E.;POLI, GARY NICHOLAS |
| 分类号 |
H01L21/3205;C23C18/18;C23C18/32;H01L21/288;H01L21/768;H01L23/522 |
主分类号 |
H01L21/3205 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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