发明名称 CONTROL METHOD FOR ADDITIONAL PROCESSOR
摘要 PURPOSE:To produce and execute a executing program having no dependence on a memory mapped input/output address by providing an address register to position the memory addresses for input/output as the relative addresses. CONSTITUTION:A start address is decided by an address register 21 and a mapped input/output address 22 forms a compiler that delivers such an object that can be shown in a relative address through the register 21. Thus an access is possible to the address 22 of an additional processor through a relative address register. In such a way, it is possible to produce and execute an executing program with no dependence on a system where the size of a program executing a area varies such a program that refers directly to the address 22 in a real number arithmetic mode.
申请公布号 JPS62204366(A) 申请公布日期 1987.09.09
申请号 JP19860046199 申请日期 1986.03.05
申请人 HITACHI LTD;HITACHI PROCESS COMPUT ENG INC 发明人 KURIYAMA MAKOTO
分类号 G06F15/16;G06F12/00;G06F15/167 主分类号 G06F15/16
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