发明名称 PCM RECEIVING AND DEMODULATING EQUIPMENT
摘要 <p>PURPOSE:To facilitate the processing and to ensure the real time performance in the signal processing at the post-stage by providing a data temporary storage device and a frame selection circuit as components of a PCM reception demodulating equipment. CONSTITUTION:A bit synchronizer 10 inputs a PCM input signal PCMS, applies waveform shaping, an internal block is synchronized with the clock of the input signal to form lock-on state. The output of the bit synchronizer 10 is sent to a decommutator 20, where a bit per word is formed as a parallel signal and converted into a decommutator signal DCMS 1. A data temporary storage device 30 consists of random access memories 31, 32, stores temtatively the decommutator signal DCMS1 and gives an output and the result is outputted as decommutator signals DCMS2, DCMS3. A frame selection circuit 40 selects any of decommutator signals DCMS1-3 to generate a decommutator output signal DCMS.</p>
申请公布号 JPS62202626(A) 申请公布日期 1987.09.07
申请号 JP19860045544 申请日期 1986.03.03
申请人 NEC CORP 发明人 MORI SAMIO;KUBOTA TSUTOMU
分类号 H04L7/08;H04B14/04;H04J3/06 主分类号 H04L7/08
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