| 摘要 |
PURPOSE:To attain stable synchronization even when a frequency divider is operated intermittently by using a means value in response to a leading time difference of an output signal within the operating period of the frequency divider frequency-dividing an output signal of a VCO so as to control the generated frequency from the VCO. CONSTITUTION:A phase comparator 30 consists of AND circuits 30a-30h, OR circuits 30i-30l, inverters 30m-30r, NOR circuits 30a, 30t, NAND circuits 30u-30w, and transistors 30x, 30y. A means value in response to the leading time difference of the output signal in the operating period of the frequency divider 8 formed from the output signal of the VCO 5 is outputted from the phase comparator 30 and the output of the comparator 30 controls the generated frequency of the VCO 5. Thus, when the output frequency of the VCO 5 is deviated from the synchronizing state, the output of the phase comparator 30 is changed depending on the deviation of frequency and the control is applied to cancel the change. |
