| 摘要 |
PURPOSE:To reduce the power consumption in RAS activation and prevent a decrease in the processing speed of a system by dividing refreshing operation, bank by bank. CONSTITUTION:While supplied with the 1st REFR-ESH signal 511, an RAS decoder 28-3 outputs selection signals 360 and 361 for banks BANK0 and BANK1, which are refreshed. Further, the decoder outputs selection signals 362 and 363 for banks BANK2 and BANK3 while supplied with the 2nd REFRESH signal 512 to refresh the banks BANK2 and BANK3. The refreshing operation starts and ends with a half-cycle shift because of the relation between clock signals 581 and 582, so the peak of current consumption is divided into every two banks and averaged. Further, the wait time of D-RAM16 in refreshing operation is equalized to that of a conventional device which refreshes all banks at a time. |
